Unit 2: Bridge Topologies: Half-Bridge and Full-Bridge Isolated Conversion

Unit 2: Three-phase voltage-source converters

Engineering situation

Three-phase modulation uses three coordinated switching legs. A commanded set of phase voltages can be represented as a rotating vector in a stationary plane; the vector description simplifies modulation analysis but does not remove semiconductor constraints or common-mode voltages.

Shared numerical scenario

The shared case is a 300 V educational DC-link model supplying a balanced three-phase passive load. This is a mathematical exercise: the corresponding hardware would be hazardous. Phase-to-neutral and line-to-line voltages differ by a factor of square-root three for balanced sinusoids, and the distinction matters in every motor-drive specification.

Intended competence

Learners will identify active and zero states, distinguish carrier-based PWM from space-vector PWM, interpret common-mode voltage, and estimate dead-time distortion. All waveform plots represent deterministic switching models with no grid synchronization or safety claims.

Assumptions and model boundary

This unit uses specific equations at specific operating points; a model must not be extended merely because it produces a number outside the stated range. In particular, the switching network may be averaged over a PWM period for a slow state calculation, while magnetic reset, terminal-voltage stress and semiconductor switching energy demand individual switching intervals. Keep the mechanical, magnetic and electrical energy variables separate where appropriate. Every diagram should identify a reference node, current direction and whether the axes show peak, average, or RMS quantities. Where an external network or motor is discussed, the waveform is software-generated for learning and does not authorize connection to an energized system.

Unit reading route

Read Lessons 2.1 through 2.4 in sequence, then use the [unit simulation](../simulations/model-02.html). Complete the unit project before the assessment. Preserve the original scenario as a baseline so parameter changes are attributable; do not change source, loading and control law simultaneously. When citing a numerical result, write the values, units and limit cases, then label it as ideal analytical, simplified dynamic model, computed simulation or actual measurement. No measurement claims are made here.

Technical review checkpoint

The algebra of switching states is only reliable when terminal references remain consistent. A floating load neutral, a DC negative terminal, a protective-earth conductor and a mathematical zero-sequence component are not equivalent. Changing the reference silently can change every reported phase voltage without changing the actual line voltage.

Reconstruct one stated switching interval from the upper-device binary state, compute all three line-to-line voltages, then verify that Vab+Vbc+Vca=0. A failed sum is a strong indicator of a sign or node-label error.

A good explanation specifies the assumptions under which a relation is true and names an experiment or simulation capable of detecting when it fails. A numerical waveform can agree with its own programmed equations and still be incapable of predicting a real apparatus. Use the following assessment to distinguish those two forms of evidence.

Lesson 2.1: Three-phase bridge switching states

Position: Unit 2, Three-phase voltage-source converters. Reading level: undergraduate circuit analysis, switching converters and elementary calculus. Learning claim: distinguish the mathematical approximation from the physical device-level consequences. Status: unreviewed teaching chapter.

Physical picture and mechanism

A conventional two-level three-phase bridge has eight ideal switching combinations, represented as three binary upper-device states. Two are zero vectors because all three phase terminals are tied to the same DC rail; six active states create nonzero line-to-line voltage patterns. This is a switching-state description, not an independent neutral connection.

The practical boundary of the system matters. Draw where energy enters, where useful energy leaves, what storage changes within the process and where heat or field energy is likely to be lost. Define all voltage polarities before changing reference frames; a reported sign is physically meaningful only relative to a declared node or direction. The natural interval for averaging must also be stated: a switching-period equation, a line-frequency RMS result and a slowly varying thermal estimate describe different aspects of the same apparatus. One cannot simply average all three over an arbitrary interval and call the result a design guarantee.

Governing mathematical relation

For phase state bits Sa,Sb,Sc ∈{0,1}, ideal pole voltages relative to the negative DC rail equal Sa Vdc, Sb Vdc, Sc Vdc. Line voltage Vab=(Sa−Sb)Vdc. Phase-to-neutral values require a specified load neutral or a balanced floating-neutral assumption.

Write the baseline relation symbolically first, then test it against a dimensional check and an elementary limiting case. For a variable expressed as a rate, verify what time base is implicit: per switching period, per electrical cycle, per unit mechanical rotation or per second. If the equation assumes continuous conduction, a linear magnetic inductance, an ideal waveform or a balanced three-phase input, say so before substituting numerical values. For a measured value, specify sensor position and measurement bandwidth; for a computed value, identify the exact source equation.

Worked numerical example with interpretation

With Vdc=300 V and state (1,0,0), Vab=+300 V, Vbc=0 V and Vca=−300 V. For a balanced floating star load, mean pole voltage is 100 V, giving instantaneous phase potentials (200,−100,−100) V relative to the floating star point.

A credible numerical answer includes both a displayed number and its physical meaning. If a computed voltage is a peak, it cannot be directly used as an RMS rating. If a frequency is a natural resonance, it cannot be presented as a measured closed-loop bandwidth. If a result is an ideal output voltage, it cannot be equated with the real part's dielectric withstand requirement. Use at least three significant digits in the intermediate steps and round the final display to the precision actually supported by input parameters. A second independent check, such as energy conservation, a complementary voltage, or the expected response as one variable approaches zero, should be written beside the arithmetic.

Derivation workflow

Start from a physical definition and then introduce any simplification. Before calculating, sketch or describe the states that make the claimed equation meaningful. A derived relation is usually an operating-point statement, not a guarantee across startup, overload and faulted conditions. Distinguish independent inputs from outputs: a duty ratio may be commanded by the regulator, but a peak current is determined jointly by source voltage, load, storage and event timing.

Check dimensions at every substitution. In particular, microseconds and nanoseconds differ by a factor of one thousand; degrees and radians require explicit conversion before inserting a frequency; and a quantity in electrical radians per second is not a shaft speed in revolutions per minute. The direction of energy flow should be consistent with the current-arrow convention shown beside the circuit or graph.

Important failure modes and nonideal boundaries

A common error is to call +300 V the phase-to-neutral voltage without establishing the neutral reference. A real inverter cannot change device state instantaneously: gate-driver delays and blanking times alter the observed waveform.

These limitations are not a minor footnote: they are the conditions under which this chapter's conclusion could reverse. Separate the design intent from the semiconductor's transient stress, and the requested controller action from the physical switching state. A controller display can be numerically smooth while its switching node is overshooting; a motor speed command can be well behaved while the DC bus is absorbing excessive regenerative energy. A waveform generated by a hand-written program is only as complete as the modeled parasitics and fault behavior.

Engineering judgment

Build the full eight-row switching-state table and use it to check every line-voltage sign. Include both (0,0,0) and (1,1,1) as distinct device states even though their ideal line voltages are zero.

An engineering comparison should use a common reference case and explicitly report one metric that improves and one that could worsen. For example, increasing switching frequency may reduce some storage ripple yet increase switching heat and radiated emissions; adding capacitance may smooth a voltage while raising surge energy and discharge requirements; increasing control bandwidth may improve tracking while reducing delay tolerance. The tradeoff depends on this lesson's topology and assumptions. Where the text omits a datasheet value, test configuration or certification criterion, the correct output is 'not established' rather than an invented margin.

Focused exercise set

Exercise A — reconstruct. Rewrite the governing relation above using named inputs and outputs. Draw or describe the source, load, storage or reference frame that makes it valid. Mark whether the calculated result is a switching-period average, fundamental value, transient peak, energy, current, power, frequency or loss.

Exercise B — parameter sensitivity. Reproduce the numerical case but change the most influential stated input by +10% while keeping all other inputs fixed. Show the substituted equation and the new number. Explain whether the response is expected to be linear, reciprocal, quadratic or nonlinear, and whether the modified point remains inside the same assumed operating regime.

Exercise C — challenge the assumption. Identify one concrete event, such as a load step, missing feedback signal, frequency detuning, angle-estimation error, current sign reversal or temperature change, that makes the basic calculation incomplete. State which extra measurement or model parameter would be necessary to proceed.

Exercise D — compare choices. Evaluate a second solution concept, not simply a different numerical parameter. Compare source-current stress, controllability, complexity and validation burden. Give a reason the choice could change at light load or at a different source voltage.

Exercise E — audit someone else's answer. A classmate reports a precise 'safe and efficient' result after using only the simplified equation in this lesson. Write a six-line technical review identifying one valid quantitative conclusion, one ignored uncertainty, one protection concern, one proposed simulation, one missing empirical test and the exact boundary of the claim.

Answer guidance and grading rubric

For Exercise A, the key is a consistent sign convention and correct categorization of the calculated quantity. In Exercise B the arithmetic must start from the same stated units, and a legitimate answer must note when a changed parameter would require a new operating regime. In Exercise C the missing variable must materially affect the behavior, rather than being a vague appeal to 'more data'. Exercise D earns full credit only when the alternate architecture changes an engineering tradeoff; merely changing a plotted color is not a design option. Exercise E must not describe software results as measurements or claim an external safety approval. Partial credit is appropriate for an otherwise correct derivation with an explicit, honest limitation; no credit for physically inconsistent units or an unstated phase-voltage reference.

Bridge to the unit model

Reference-frame and topology integrity: The algebra of switching states is only reliable when terminal references remain consistent. A floating load neutral, a DC negative terminal, a protective-earth conductor and a mathematical zero-sequence component are not equivalent. Changing the reference silently can change every reported phase voltage without changing the actual line voltage.

Reconstruct one stated switching interval from the upper-device binary state, compute all three line-to-line voltages, then verify that Vab+Vbc+Vca=0. A failed sum is a strong indicator of a sign or node-label error.

The companion simulation uses deterministic, intentionally simplified equations. Preserve input settings and screenshot or export the computed parameters together with any graph. A successful interactive plot demonstrates software operation and internal mathematical consistency for the declared formulas; it does not prove real component compatibility. Return to the central question of this chapter: what is calculated, what is assumed, and what is still unknown?

Lesson 2.2: Space-vector modulation geometry

Position: Unit 2, Three-phase voltage-source converters. Reading level: undergraduate circuit analysis, switching converters and elementary calculus. Learning claim: distinguish the mathematical approximation from the physical device-level consequences. Status: unreviewed teaching chapter.

Physical picture and mechanism

Space-vector modulation represents three-phase reference commands using a two-axis voltage vector and approximates it over a PWM period by spending calculated fractions of time in nearby active states and zero states. The vector concept can reduce redundant calculations while allowing different zero-state arrangements. It does not imply continuously variable semiconductor voltage.

The practical boundary of the system matters. Draw where energy enters, where useful energy leaves, what storage changes within the process and where heat or field energy is likely to be lost. Define all voltage polarities before changing reference frames; a reported sign is physically meaningful only relative to a declared node or direction. The natural interval for averaging must also be stated: a switching-period equation, a line-frequency RMS result and a slowly varying thermal estimate describe different aspects of the same apparatus. One cannot simply average all three over an arbitrary interval and call the result a design guarantee.

Governing mathematical relation

Within a 60° sector, ideal normalized dwell fractions are T1/Ts=m sin(π/3−θ) and T2/Ts=m sin θ for a particular modulation normalization. The remaining fraction is zero-vector dwell; the formula is valid only when that remainder is nonnegative and the normalization is defined.

Write the baseline relation symbolically first, then test it against a dimensional check and an elementary limiting case. For a variable expressed as a rate, verify what time base is implicit: per switching period, per electrical cycle, per unit mechanical rotation or per second. If the equation assumes continuous conduction, a linear magnetic inductance, an ideal waveform or a balanced three-phase input, say so before substituting numerical values. For a measured value, specify sensor position and measurement bandwidth; for a computed value, identify the exact source equation.

Worked numerical example with interpretation

For m=0.8 and θ=30°, T1/Ts=T2/Ts=0.8×0.5=0.4, leaving T0/Ts=0.2. If the switching period is 100 µs the two active times are 40 µs each and the combined zero time is 20 µs.

A credible numerical answer includes both a displayed number and its physical meaning. If a computed voltage is a peak, it cannot be directly used as an RMS rating. If a frequency is a natural resonance, it cannot be presented as a measured closed-loop bandwidth. If a result is an ideal output voltage, it cannot be equated with the real part's dielectric withstand requirement. Use at least three significant digits in the intermediate steps and round the final display to the precision actually supported by input parameters. A second independent check, such as energy conservation, a complementary voltage, or the expected response as one variable approaches zero, should be written beside the arithmetic.

Model comparison workflow

A second model is useful only if it changes an identifiable assumption. Compare an ideal lossless expression with a bounded nonideal version, or a fixed load with a changed load; do not modify several unrelated quantities and attribute the entire difference to a single mechanism. Make a table showing which equations survive the changed operating regime and which must be derived again.

Include the neglected process in plain language even when it cannot be computed: leakage inductance, dead time, load-angle error, winding temperature or non-sinusoidal current can change a conclusion. Giving an uncalibrated guessed correction factor to hide that omission is less useful than stating that the quantity remains unknown.

Important failure modes and nonideal boundaries

Alternative texts define m differently, sometimes including √3 and bus scaling. Copying dwell formulas between conventions without conversion can falsely produce a negative zero-vector time and an apparent overmodulation event.

These limitations are not a minor footnote: they are the conditions under which this chapter's conclusion could reverse. Separate the design intent from the semiconductor's transient stress, and the requested controller action from the physical switching state. A controller display can be numerically smooth while its switching node is overshooting; a motor speed command can be well behaved while the DC bus is absorbing excessive regenerative energy. A waveform generated by a hand-written program is only as complete as the modeled parasitics and fault behavior.

Engineering judgment

Write the reference-vector amplitude normalization next to every timing table. Apply quantization to each interval, then verify the synthesized average voltage and any minimum pulse-width constraint.

An engineering comparison should use a common reference case and explicitly report one metric that improves and one that could worsen. For example, increasing switching frequency may reduce some storage ripple yet increase switching heat and radiated emissions; adding capacitance may smooth a voltage while raising surge energy and discharge requirements; increasing control bandwidth may improve tracking while reducing delay tolerance. The tradeoff depends on this lesson's topology and assumptions. Where the text omits a datasheet value, test configuration or certification criterion, the correct output is 'not established' rather than an invented margin.

Focused exercise set

Exercise A — reconstruct. Rewrite the governing relation above using named inputs and outputs. Draw or describe the source, load, storage or reference frame that makes it valid. Mark whether the calculated result is a switching-period average, fundamental value, transient peak, energy, current, power, frequency or loss.

Exercise B — parameter sensitivity. Reproduce the numerical case but change the most influential stated input by +10% while keeping all other inputs fixed. Show the substituted equation and the new number. Explain whether the response is expected to be linear, reciprocal, quadratic or nonlinear, and whether the modified point remains inside the same assumed operating regime.

Exercise C — challenge the assumption. Identify one concrete event, such as a load step, missing feedback signal, frequency detuning, angle-estimation error, current sign reversal or temperature change, that makes the basic calculation incomplete. State which extra measurement or model parameter would be necessary to proceed.

Exercise D — compare choices. Evaluate a second solution concept, not simply a different numerical parameter. Compare source-current stress, controllability, complexity and validation burden. Give a reason the choice could change at light load or at a different source voltage.

Exercise E — audit someone else's answer. A classmate reports a precise 'safe and efficient' result after using only the simplified equation in this lesson. Write a six-line technical review identifying one valid quantitative conclusion, one ignored uncertainty, one protection concern, one proposed simulation, one missing empirical test and the exact boundary of the claim.

Answer guidance and grading rubric

For Exercise A, the key is a consistent sign convention and correct categorization of the calculated quantity. In Exercise B the arithmetic must start from the same stated units, and a legitimate answer must note when a changed parameter would require a new operating regime. In Exercise C the missing variable must materially affect the behavior, rather than being a vague appeal to 'more data'. Exercise D earns full credit only when the alternate architecture changes an engineering tradeoff; merely changing a plotted color is not a design option. Exercise E must not describe software results as measurements or claim an external safety approval. Partial credit is appropriate for an otherwise correct derivation with an explicit, honest limitation; no credit for physically inconsistent units or an unstated phase-voltage reference.

Bridge to the unit model

Reference-frame and topology integrity: The algebra of switching states is only reliable when terminal references remain consistent. A floating load neutral, a DC negative terminal, a protective-earth conductor and a mathematical zero-sequence component are not equivalent. Changing the reference silently can change every reported phase voltage without changing the actual line voltage.

Reconstruct one stated switching interval from the upper-device binary state, compute all three line-to-line voltages, then verify that Vab+Vbc+Vca=0. A failed sum is a strong indicator of a sign or node-label error.

The companion simulation uses deterministic, intentionally simplified equations. Preserve input settings and screenshot or export the computed parameters together with any graph. A successful interactive plot demonstrates software operation and internal mathematical consistency for the declared formulas; it does not prove real component compatibility. Return to the central question of this chapter: what is calculated, what is assumed, and what is still unknown?

Lesson 2.3: Common-mode voltage and parasitic paths

Position: Unit 2, Three-phase voltage-source converters. Reading level: undergraduate circuit analysis, switching converters and elementary calculus. Learning claim: distinguish the mathematical approximation from the physical device-level consequences. Status: unreviewed teaching chapter.

Physical picture and mechanism

The common-mode pole voltage is the average of the three inverter pole voltages relative to a chosen DC reference. Rapid changes in this voltage excite parasitic capacitive current paths through motor winding insulation, bearings, heatsinks and enclosures. A balanced line-to-line sinusoid does not eliminate common-mode excitation.

The practical boundary of the system matters. Draw where energy enters, where useful energy leaves, what storage changes within the process and where heat or field energy is likely to be lost. Define all voltage polarities before changing reference frames; a reported sign is physically meaningful only relative to a declared node or direction. The natural interval for averaging must also be stated: a switching-period equation, a line-frequency RMS result and a slowly varying thermal estimate describe different aspects of the same apparatus. One cannot simply average all three over an arbitrary interval and call the result a design guarantee.

Governing mathematical relation

For pole voltages Va0,Vb0,Vc0, define Vcm=(Va0+Vb0+Vc0)/3 relative to the negative rail. The capacitive current relation i=Cpar dvcm/dt provides a first approximation of fast common-mode current through a parasitic capacitance.

Write the baseline relation symbolically first, then test it against a dimensional check and an elementary limiting case. For a variable expressed as a rate, verify what time base is implicit: per switching period, per electrical cycle, per unit mechanical rotation or per second. If the equation assumes continuous conduction, a linear magnetic inductance, an ideal waveform or a balanced three-phase input, say so before substituting numerical values. For a measured value, specify sensor position and measurement bandwidth; for a computed value, identify the exact source equation.

Worked numerical example with interpretation

With Vdc=300 V, state (1,0,0) yields Vcm=100 V; state (1,1,1) yields 300 V. For an illustrative 2 nF path and a 100 V change over 100 ns, C ΔV/Δt gives 2 A transient current. This represents a rough edge estimate, not a constant 2 A load.

A credible numerical answer includes both a displayed number and its physical meaning. If a computed voltage is a peak, it cannot be directly used as an RMS rating. If a frequency is a natural resonance, it cannot be presented as a measured closed-loop bandwidth. If a result is an ideal output voltage, it cannot be equated with the real part's dielectric withstand requirement. Use at least three significant digits in the intermediate steps and round the final display to the precision actually supported by input parameters. A second independent check, such as energy conservation, a complementary voltage, or the expected response as one variable approaches zero, should be written beside the arithmetic.

Measurement and inference workflow

Define what an instrument would actually observe, even though this exercise is software only. A spectrum analyzer reports a frequency-domain estimate, a current sensor reports a bandwidth-limited sample, and a thermal measurement reports temperature at a location and time. None directly measures every term in an analytical state equation. Design an independent cross-check using conservation of energy or symmetry before trusting a displayed result.

Record the intended sample rate, window, triggering event and reference node. For transient switching analyses distinguish a 10 ns peak from a 1 ms average and identify whether the probe itself could perturb the observed circuit. If a claim needs actual bench data, mark it explicitly as not yet established.

Important failure modes and nonideal boundaries

A very small parasitic capacitance can support significant transient current under fast edges. However, the equivalent lumped capacitance ignores distributed cables and frequency-dependent impedances, so the peak magnitude needs measured validation.

These limitations are not a minor footnote: they are the conditions under which this chapter's conclusion could reverse. Separate the design intent from the semiconductor's transient stress, and the requested controller action from the physical switching state. A controller display can be numerically smooth while its switching node is overshooting; a motor speed command can be well behaved while the DC bus is absorbing excessive regenerative energy. A waveform generated by a hand-written program is only as complete as the modeled parasitics and fault behavior.

Engineering judgment

Compare zero-vector placement strategies and cable models before claiming one PWM method solves bearing currents or EMI. Separate differential-mode and common-mode filters in the design rationale.

An engineering comparison should use a common reference case and explicitly report one metric that improves and one that could worsen. For example, increasing switching frequency may reduce some storage ripple yet increase switching heat and radiated emissions; adding capacitance may smooth a voltage while raising surge energy and discharge requirements; increasing control bandwidth may improve tracking while reducing delay tolerance. The tradeoff depends on this lesson's topology and assumptions. Where the text omits a datasheet value, test configuration or certification criterion, the correct output is 'not established' rather than an invented margin.

Focused exercise set

Exercise A — reconstruct. Rewrite the governing relation above using named inputs and outputs. Draw or describe the source, load, storage or reference frame that makes it valid. Mark whether the calculated result is a switching-period average, fundamental value, transient peak, energy, current, power, frequency or loss.

Exercise B — parameter sensitivity. Reproduce the numerical case but change the most influential stated input by +10% while keeping all other inputs fixed. Show the substituted equation and the new number. Explain whether the response is expected to be linear, reciprocal, quadratic or nonlinear, and whether the modified point remains inside the same assumed operating regime.

Exercise C — challenge the assumption. Identify one concrete event, such as a load step, missing feedback signal, frequency detuning, angle-estimation error, current sign reversal or temperature change, that makes the basic calculation incomplete. State which extra measurement or model parameter would be necessary to proceed.

Exercise D — compare choices. Evaluate a second solution concept, not simply a different numerical parameter. Compare source-current stress, controllability, complexity and validation burden. Give a reason the choice could change at light load or at a different source voltage.

Exercise E — audit someone else's answer. A classmate reports a precise 'safe and efficient' result after using only the simplified equation in this lesson. Write a six-line technical review identifying one valid quantitative conclusion, one ignored uncertainty, one protection concern, one proposed simulation, one missing empirical test and the exact boundary of the claim.

Answer guidance and grading rubric

For Exercise A, the key is a consistent sign convention and correct categorization of the calculated quantity. In Exercise B the arithmetic must start from the same stated units, and a legitimate answer must note when a changed parameter would require a new operating regime. In Exercise C the missing variable must materially affect the behavior, rather than being a vague appeal to 'more data'. Exercise D earns full credit only when the alternate architecture changes an engineering tradeoff; merely changing a plotted color is not a design option. Exercise E must not describe software results as measurements or claim an external safety approval. Partial credit is appropriate for an otherwise correct derivation with an explicit, honest limitation; no credit for physically inconsistent units or an unstated phase-voltage reference.

Bridge to the unit model

Reference-frame and topology integrity: The algebra of switching states is only reliable when terminal references remain consistent. A floating load neutral, a DC negative terminal, a protective-earth conductor and a mathematical zero-sequence component are not equivalent. Changing the reference silently can change every reported phase voltage without changing the actual line voltage.

Reconstruct one stated switching interval from the upper-device binary state, compute all three line-to-line voltages, then verify that Vab+Vbc+Vca=0. A failed sum is a strong indicator of a sign or node-label error.

The companion simulation uses deterministic, intentionally simplified equations. Preserve input settings and screenshot or export the computed parameters together with any graph. A successful interactive plot demonstrates software operation and internal mathematical consistency for the declared formulas; it does not prove real component compatibility. Return to the central question of this chapter: what is calculated, what is assumed, and what is still unknown?

Lesson 2.4: Dead-time voltage error and compensation

Position: Unit 2, Three-phase voltage-source converters. Reading level: undergraduate circuit analysis, switching converters and elementary calculus. Learning claim: distinguish the mathematical approximation from the physical device-level consequences. Status: unreviewed teaching chapter.

Physical picture and mechanism

In a half bridge, the deliberately inserted nonoverlap interval causes the output pole to freewheel according to the instantaneous current direction. This creates a systematic voltage error that often changes sign when load current reverses, contributing to low-speed torque ripple and distorted current zero-crossings.

The practical boundary of the system matters. Draw where energy enters, where useful energy leaves, what storage changes within the process and where heat or field energy is likely to be lost. Define all voltage polarities before changing reference frames; a reported sign is physically meaningful only relative to a declared node or direction. The natural interval for averaging must also be stated: a switching-period equation, a line-frequency RMS result and a slowly varying thermal estimate describe different aspects of the same apparatus. One cannot simply average all three over an arbitrary interval and call the result a design guarantee.

Governing mathematical relation

A first-order magnitude estimate for an average pole-voltage error is |ΔV|≈Vdc td fs, where td is nonoverlap time and fs is switching frequency. Actual polarity depends on current, device and diode conduction. Device turn-on and turn-off delays may not be symmetric.

Write the baseline relation symbolically first, then test it against a dimensional check and an elementary limiting case. For a variable expressed as a rate, verify what time base is implicit: per switching period, per electrical cycle, per unit mechanical rotation or per second. If the equation assumes continuous conduction, a linear magnetic inductance, an ideal waveform or a balanced three-phase input, say so before substituting numerical values. For a measured value, specify sensor position and measurement bandwidth; for a computed value, identify the exact source equation.

Worked numerical example with interpretation

For Vdc=300 V, td=1 µs and fs=10 kHz, the approximate per-leg error magnitude is 300×10^-6×10^4=3 V. This value is not an additional line-to-line RMS voltage and must not be inserted directly into a motor-voltage rating.

A credible numerical answer includes both a displayed number and its physical meaning. If a computed voltage is a peak, it cannot be directly used as an RMS rating. If a frequency is a natural resonance, it cannot be presented as a measured closed-loop bandwidth. If a result is an ideal output voltage, it cannot be equated with the real part's dielectric withstand requirement. Use at least three significant digits in the intermediate steps and round the final display to the precision actually supported by input parameters. A second independent check, such as energy conservation, a complementary voltage, or the expected response as one variable approaches zero, should be written beside the arithmetic.

Design-release workflow

A mathematical design is complete only relative to its declared requirements. Produce a decision matrix connecting efficiency, voltage stress, current stress, temperature, dynamics, isolation where applicable, EMC and fault response. Each column has a different pass criterion; a high numerical efficiency cannot compensate for a failed voltage rating or missing fault isolation.

Audit the design under the worst credible input, the largest and smallest loads, startup, shutdown and a sensor fault. State which cases have been derived, which have only been simulated, and which demand independent qualified testing. A student solution can be rigorous while acknowledging that specific manufacturers' datasheets and safety standards have not been checked.

Important failure modes and nonideal boundaries

Compensation based solely on the sign of a noisy current sample can oscillate around zero crossing. The minimum pulse width and hardware interlocks are independent from the software correction strategy.

These limitations are not a minor footnote: they are the conditions under which this chapter's conclusion could reverse. Separate the design intent from the semiconductor's transient stress, and the requested controller action from the physical switching state. A controller display can be numerically smooth while its switching node is overshooting; a motor speed command can be well behaved while the DC bus is absorbing excessive regenerative energy. A waveform generated by a hand-written program is only as complete as the modeled parasitics and fault behavior.

Engineering judgment

Design a sign-aware compensation law using a deadband near zero current, then show how you would compare uncompensated and compensated waveforms in simulation without claiming a hardware-safe dead time.

An engineering comparison should use a common reference case and explicitly report one metric that improves and one that could worsen. For example, increasing switching frequency may reduce some storage ripple yet increase switching heat and radiated emissions; adding capacitance may smooth a voltage while raising surge energy and discharge requirements; increasing control bandwidth may improve tracking while reducing delay tolerance. The tradeoff depends on this lesson's topology and assumptions. Where the text omits a datasheet value, test configuration or certification criterion, the correct output is 'not established' rather than an invented margin.

Focused exercise set

Exercise A — reconstruct. Rewrite the governing relation above using named inputs and outputs. Draw or describe the source, load, storage or reference frame that makes it valid. Mark whether the calculated result is a switching-period average, fundamental value, transient peak, energy, current, power, frequency or loss.

Exercise B — parameter sensitivity. Reproduce the numerical case but change the most influential stated input by +10% while keeping all other inputs fixed. Show the substituted equation and the new number. Explain whether the response is expected to be linear, reciprocal, quadratic or nonlinear, and whether the modified point remains inside the same assumed operating regime.

Exercise C — challenge the assumption. Identify one concrete event, such as a load step, missing feedback signal, frequency detuning, angle-estimation error, current sign reversal or temperature change, that makes the basic calculation incomplete. State which extra measurement or model parameter would be necessary to proceed.

Exercise D — compare choices. Evaluate a second solution concept, not simply a different numerical parameter. Compare source-current stress, controllability, complexity and validation burden. Give a reason the choice could change at light load or at a different source voltage.

Exercise E — audit someone else's answer. A classmate reports a precise 'safe and efficient' result after using only the simplified equation in this lesson. Write a six-line technical review identifying one valid quantitative conclusion, one ignored uncertainty, one protection concern, one proposed simulation, one missing empirical test and the exact boundary of the claim.

Answer guidance and grading rubric

For Exercise A, the key is a consistent sign convention and correct categorization of the calculated quantity. In Exercise B the arithmetic must start from the same stated units, and a legitimate answer must note when a changed parameter would require a new operating regime. In Exercise C the missing variable must materially affect the behavior, rather than being a vague appeal to 'more data'. Exercise D earns full credit only when the alternate architecture changes an engineering tradeoff; merely changing a plotted color is not a design option. Exercise E must not describe software results as measurements or claim an external safety approval. Partial credit is appropriate for an otherwise correct derivation with an explicit, honest limitation; no credit for physically inconsistent units or an unstated phase-voltage reference.

Bridge to the unit model

Reference-frame and topology integrity: The algebra of switching states is only reliable when terminal references remain consistent. A floating load neutral, a DC negative terminal, a protective-earth conductor and a mathematical zero-sequence component are not equivalent. Changing the reference silently can change every reported phase voltage without changing the actual line voltage.

Reconstruct one stated switching interval from the upper-device binary state, compute all three line-to-line voltages, then verify that Vab+Vbc+Vca=0. A failed sum is a strong indicator of a sign or node-label error.

The companion simulation uses deterministic, intentionally simplified equations. Preserve input settings and screenshot or export the computed parameters together with any graph. A successful interactive plot demonstrates software operation and internal mathematical consistency for the declared formulas; it does not prove real component compatibility. Return to the central question of this chapter: what is calculated, what is assumed, and what is still unknown?

Unit 2 project: Eight-state bridge and vector-timing audit

Scope: software-only engineering study and analytical notebook. No mains, traction battery, energized utility interface, or uncontrolled rotating machine is authorized. Deliverables: calculation sheet, documented assumptions, parameter sweep, self-check plot, uncertainty register and short technical decision record.

Project brief

Enumerate the eight two-level three-phase switching states for Vdc=300 V. For each state compute all three line-to-line potentials and the average pole voltage, then mark the two zero-vector states. For one sector at θ=30° and normalized m=0.8 calculate dwell times at Ts=100 µs.

Begin with a clear control volume and state where power enters and exits. Draw the useful storage variables alongside the PWM switching states. Specify both time scales that matter: a switching or sampled control step, and the slower physical response. Fix a baseline and use identical physical units in every table. Give each graph explicit axis units and distinguish the dependent variable from the manipulated independent parameter.

Experiment 1 — reproduce the baseline

Calculate all baseline quantities by hand or a reproducible script using the equations in Lessons 2.1–2.4. Retain three significant figures before rounding. Use a dimensional cross-check and, where possible, an energy-conservation check. If the model has only a steady-state answer, state why it cannot predict transient overshoot or a semiconductor edge event. Record a short comment explaining whether the computed output is peak, RMS, mean or instantaneous.

Experiment 2 — a controlled perturbation

Perturb the electrical angle by ±10° within the sector. Recalculate the two active dwell fractions and zero dwell. Determine whether the total still equals the PWM period after rounding to 1 µs timing resolution.

An informative parameter sweep changes one physical variable at a time and makes the boundary of the model visible. Where the response is proportional to a square, plot both the direct input and its square so a linear relationship in the transformed variable is evident. Where frequency is varied, avoid mixing hertz and radians per second. Add a small error budget that separates rounding, parameter tolerance and explicitly unmodeled physics. Never present the neatness of a plotted line as independent validation of a physical circuit.

Deliverable and evidence standard

Provide a self-check script or a spreadsheet table that verifies Vab+Vbc+Vca=0 and T1+T2+T0=Ts for each valid reference. Keep phase-to-neutral results separate from pole-to-DC-minus results.

Include a table with columns: claim; governing equation; assumed parameter; predicted number; sensitivity to a changed parameter; required physical measurement; status. At least three rows must be marked 'analytical estimate', one must be marked 'simulation only', and two must be marked 'unverified without real data'. If a control function is said to protect a system, describe the software state that changes; do not imply that a high-energy circuit is safely disconnected by an untested algorithm.

Critical decision memo

Write 300–500 words comparing the baseline design against one alternative, showing what improves, what becomes more difficult and what would stop a release. Quantify at least one tradeoff. A technically credible answer may decline to rank options when necessary thermal or component properties were not specified. In that case identify the least-cost experiment or authoritative datasheet information that would resolve the ambiguity. Conclude with an operating-region sketch rather than an unsupported single optimum.

Instructor solution and boundary conditions

At θ=30°, ideal normalized fractions are 0.4, 0.4 and 0.2. Hence T1=40 µs, T2=40 µs, T0=20 µs. A calculation yielding negative zero time must be labeled outside the specified normalization or overmodulated, not forced to fit by silently clipping a dwell.

An acceptable submission reproduces the numerical baseline independently; makes the units and sign conventions unambiguous; describes what extra physical or sampled-time behavior could invalidate the results; and includes an explicit exclusion of hardware safety certification. An incorrect submission treats a nominal fundamental voltage as total broadband RMS, mistakes a mathematical natural frequency for an empirical stability limit, or declares a component safe without its applicable manufacturer ratings. Project success demonstrates reasoning and traceable calculation, not a built converter.