Unit 2: Thermal Modeling, Safe Operating Area (SOA), and Heat Sink Design

Unit 2 — Power semiconductors and operating limits

The engineering argument

Power devices must block voltage, conduct current and transition between those states without exceeding electrical or thermal limits. Choosing a MOSFET from its drain current headline alone overlooks switching energy, voltage overshoot, avalanche behavior and gate-drive requirements.

The unit uses a 48 V intermediate bus. We compare a low-resistance transistor with a device having higher on-resistance but lower charge, recognizing that the answer changes as frequency, current and thermal resistance change. Device selection is an optimization over the actual use case.

Datasheet ratings have test conditions. A device with a 100 V limit may fail on a 48 V bus if parasitic inductance and fast switching cause large overshoot. Junction temperature may be far above the case or board temperature. Switching safe operating area is not determined by DC current alone.

Device characterization and stress envelopes. A device comparison should begin with quantities at the actual operating temperature. The table of absolute maximum ratings is a hard boundary, not a recommended set point. The combination of repetitive switching, waveform overshoot and cyclic heating creates a different stress condition from DC characterization.

Separate conduction losses from switching transition losses and driver losses. Report assumptions for diode forward voltage, channel resistance, turn-on energy and reverse-recovery energy. The separate terms make a model auditable; a mysterious single total-loss coefficient conceals the reason a design is hot.

Inspect frequency dependence before promising greater efficiency. Raising switching frequency permits smaller magnetics and filters, but often increases gate charge and overlap energy dissipated each second. The lower total mass may be worth the heat in one product and unacceptable in another.

Thermal verification needs a complete heat path from junction through package, interface, sink or PCB to ambient. A cool external surface is insufficient evidence that the embedded junction remains below a derated limit during fast transients.

Sequence and learning objectives

In the first lesson, identify the model, boundary and relevant physical state. In the second, compute the dominant currents, voltages or losses under a specified operating point. In the third, investigate where the ideal result ceases to hold. In the fourth, convert the model into a design review with independently falsifiable tests. This sequence is intended to prevent equation memorization without comprehension. The central question is not whether a formula can be remembered but whether the learner can recognize when it should not be used.

Unit reading

• 1. [Diode conduction, recovery and loss](lessons/U02-L01-diode-conduction-recovery-and-loss.html)
• 2. [MOSFET channel conduction and gate charge](lessons/U02-L02-mosfet-channel-conduction-and-gate-charge.html)
• 3. [Switching transitions and overlap energy](lessons/U02-L03-switching-transitions-and-overlap-energy.html)
• 4. [Safe operating area, derating and heat flow](lessons/U02-L04-safe-operating-area-derating-and-heat-flow.html)

Unit model: [interactive simulation](simulations/model-02.html). Unit project: [design study](projects/unit-02.html). Assessment: [review problems](assessments/unit-02.html).

Lesson 2.1 — Diode conduction, recovery and loss

Unit: Power semiconductors and operating limits. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

A rectifier diode carries current primarily in one direction, but real forward voltage causes power dissipation and stored charge can prolong reverse recovery. In a fast commutating stage, reverse recovery injects transient current and dissipates energy in the diode and switching transistor. Schottky devices reduce certain recovery effects but bring leakage and blocking-voltage tradeoffs.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

An average 4 A diode current with an assumed constant 0.65 V forward drop dissipates 2.6 W in the simple model. If reverse-recovery energy is 6 microjoules per transition at 80 kHz, its associated average loss is 0.48 W, giving 3.08 W total under these chosen assumptions.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

Average conduction current multiplied by a single forward drop is a simplification; actual loss requires current waveform and V_F(I,T). Reverse-recovery energy is not necessarily independent of current, temperature or dI/dt.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Compare an ordinary ultrafast diode, silicon Schottky and synchronous transistor using a specified switching current and voltage. Report blocking margin, expected heat and driver complexity instead of asserting one technology always wins.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: Why can a diode that is cool at 20 kHz run much hotter at 200 kHz without an increased load current?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 48 V device comparison dossier. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Review at a nonnominal condition

Assume the environment becomes hotter, the supply reaches its minimum allowed voltage and the output experiences a short overload. Which number in the worked example is likely to become obsolete first? Rewrite the corresponding balance or stress relation with a conservative placeholder for the uncertain quantity. If no trusted bound is available, leave the conclusion unresolved. An engineering report should explicitly state what has not been established.

Prepare a two-stage verification plan: first check the symbolic result in a calculator or independent script; next check the behavior in a simulation using nonideal elements or a supervised low-voltage teaching bench. Name a stopping condition for the second stage. Independent verification means an alternative physical or computational route to the result, not simply repeating the same source calculation in a different font.

Lesson 2.2 — MOSFET channel conduction and gate charge

Unit: Power semiconductors and operating limits. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

A power MOSFET is voltage-controlled at its insulated gate but changing the gate state requires charge and current. Fully enhanced channel dissipation is approximately I_RMS² R_DS(on); both channel resistance and total gate charge depend on chosen devices and conditions. Gate charge, rather than input capacitance alone, is useful for estimating driver effort.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

For I_RMS=8 A and R_DS(on)=18 milliohms, conduction loss is 1.152 W at the stated temperature. With Q_g=45 nC, V_drive=10 V and 100 kHz, the driver transfers about 0.045 W of gate energy under P≈Q_g V_g f; this is separate from channel switching overlap losses.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

Gate threshold voltage is not the fully enhanced drive voltage. Using V_GS(th) to select a gate supply commonly causes underdrive, heat and slow transitions. The R_DS(on) listed at 25 °C will usually differ from the hot operating value.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Choose a real gate-drive voltage from the R_DS(on) specification, maximum V_GS rating and driver architecture. Estimate driver current needed to charge Q_g over a chosen transition time and check whether wiring inductance will disturb the result.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: Which pair of datasheet plots helps compare a low-resistance, high-charge device with a higher-resistance, low-charge one?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 48 V device comparison dossier. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Source-to-load audit

Draw the current path through every conducting component in the operating state most relevant to this lesson. For a resistive component account for I²R heat; for a forward-biased diode account for the current-dependent drop; for an energy-storage element account for the sign of its energy derivative. Explain which path does not carry current during the complementary state. This diagram is a prerequisite for accurate peak, RMS and average claims. If the chosen model is averaged, mark the high-frequency phenomena that will be absent from its output.

Develop a three-column assumptions ledger: the property assumed ideal, the real physical effect omitted, and the likely sign of the error in estimated heat or voltage. Do not automatically assume every neglected effect reduces output voltage; ringing can raise instantaneous device stress while losses lower mean output. Use this ledger to decide which missing information is worth acquiring first. A model is a tool for ranking uncertainty, not a license to choose optimistic component ratings.

Lesson 2.3 — Switching transitions and overlap energy

Unit: Power semiconductors and operating limits. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

During turn-on and turn-off a transistor can simultaneously sustain nonzero drain voltage and current. The integral of v_DS(t)i_D(t) over each transition is switching energy. A linear-overlap estimate gives E≈0.5 V I t for one transition, but real commutation contains parasitic capacitances, reverse recovery and ringing.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

For a 48 V bus, 5 A current and 40 ns estimated turn-on plus 60 ns turn-off overlap, E_total≈0.5×48×5×100 ns=12 microjoules per cycle. At 100 kHz this is 1.2 W. A doubled switching frequency roughly doubles that term if waveforms remain otherwise unchanged.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

This triangular-overlap calculation is an order-of-magnitude model, not a substitute for simultaneous voltage-current measurement. Probe skew can produce a fictitious negative or large switching loss when pulses last only tens of nanoseconds.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Record transistor voltage and current with appropriately rated, compensated instruments; correct probe delay and integrate over the transition. Compare thermal implications at two frequencies before selecting a faster control clock.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: How would you separate turn-off loss from the energy stored in transistor output capacitance?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 48 V device comparison dossier. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Parameter-sensitivity notebook

Construct two more operating points around the worked example by reducing and increasing the selected key parameter by 10%. Repeat the arithmetic and compare the percent response change to the percent parameter change. If the response is nonlinear, explain why its sensitivity grows or shrinks. Examples include the inverse factor 1/(1−D) at high duty, the quadratic I²R dependence of channel heat, and the inverse dependence of ripple on L, C or switching frequency.

For the same change, decide whether the numerical model has moved closer to a known mode boundary, a component maximum rating, a closed-loop stability restriction or a measurement limitation. A derivative taken inside a valid smooth model is useful; it is not sufficient to predict behavior across a discontinuous-conduction boundary or a fault-protection trip. Identify which conclusion is local and which remains valid over the full stated range.

Lesson 2.4 — Safe operating area, derating and heat flow

Unit: Power semiconductors and operating limits. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

A semiconductor survives only if electrical stress and junction temperature remain inside the relevant time-dependent safe operating area. Junction temperature can be approximated as T_j = T_a + P_loss R_thetaJA in a steady lumped model, but layout, copper, airflow and heat-sink mounting alter thermal resistance.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

At ambient 40 °C, P_loss=3.2 W and an effective thermal resistance of 22 °C/W, the simplified prediction is 110.4 °C junction temperature. If the allowed design junction maximum is 125 °C, margin is 14.6 °C before uncertainty and transients.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

A thermal resistance measured on a reference PCB cannot simply be copied to a different enclosure. Steady thermal models ignore pulsed junction rise, thermal interfaces and neighboring hot components.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Derate voltage, current and temperature jointly. Verify junction heat estimates using a thermal path calculation, steady measurement and an independent conservative bound for the hottest use case.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: Which data would show that a proposed heat sink improves case temperature but not enough to protect the junction?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 48 V device comparison dossier. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Competing design alternatives

Compare two configurations with a fixed source, load and service requirement. One should prioritize lower conduction loss or larger energy storage, and the other should prioritize faster switching, smaller size or more economical control. Build a scorecard with heat, component stress, signal noise, cost and verification effort. Give each criterion a unit or a precise definition rather than assigning arbitrary star ratings.

A defensible conclusion should change when the service envelope changes. For example, a low-resistance transistor can be attractive under heavy current while a lower-gate-charge device can be preferable at light load and high frequency. A large bulk capacitor can improve hold-up but worsen startup inrush. Demonstrate at least one such reversal without changing unrelated assumptions at the same time. The objective is to learn why there is rarely one universally best component.

Unit 2 design study — 48 V device comparison dossier

Objective. Show that the reader can connect switching equations to a bounded engineering requirement, rather than only repeat a nominal calculation.

Scenario and data

Compare two hypothetical transistors: Device A has 18 mΩ R_DS(on) and 50 nC total gate charge; Device B has 30 mΩ and 25 nC. Let switched RMS current be 6 A, drive voltage 10 V and switching frequency 100 kHz. For both calculate channel conduction and gate-drive loss. Use the same assumed overlap time of 100 ns, then introduce a reason that identical transition time may be unjustified.

Add an off-state voltage margin check for an observed 65 V spike on a nominal 48 V bus. Explain why selecting a device rated just above 65 V may still be inadequate. Recompute thermal dissipation after a plausible hot resistance increase and record the missing datasheet data required for real selection.

Engineering notebook procedure

1. Requirements table. Write columns for demanded function, allowed input range, load range, maximum stress, accuracy tolerance, missing information and evidence. Reject adjectives without an associated test. Where values have not been provided, label them 'to be determined' and explain the measurement or datasheet that will resolve them.

2. Energy and switching state diagram. Give the current path in each interval and show inductor voltage or capacitor current with consistent sign conventions. State which approximation lets the calculation use cycle averages. If conduction mode can change, identify the condition at which the derivation stops being applicable.

3. Hand calculation. Carry through at least one numerical case from this unit's lessons, report intermediate values with units, check a limiting case, and recompute it with a 20% parameter variation. Separate assumed input values from computed results and ensure no conclusion depends on a hidden choice of waveform convention.

4. Comparison with a different model. Run the companion offline simulation at three operating points; record how its assumptions differ from the hand calculation. The model must not be described as validated physical hardware. If the simulation refuses an impossible operating point, that refusal is a finding rather than a reason to bypass the guardrail.

5. Failure analysis. Identify at least two independent failures: one electrical stress or thermal failure and one sensing, timing, protection or measurement failure. For each propose an observable symptom and a method that could falsify the simplified design claim.

6. Review and decision. Assemble a one-page design summary with chosen assumptions, calculated quantities, sensitivity, unresolved safety risks, measurement uncertainty and a justified next test. Do not specify live-mains experiments or unsupervised high-energy hardware as part of this project.

Evaluation rubric (20 points)

• Four points: correct switching-state or control-volume representation with reference directions.
• Four points: independently checkable arithmetic, correct SI units and a valid domain of application.
• Four points: design tradeoff and a nonnominal sensitivity study.
• Four points: an explicit falsification or failure test and appropriate safety bounds.
• Four points: clear interpretation of simulation limitations and remaining uncertainty.

Instructor checkpoint

A submission that uses the right numerical formula with the wrong conduction regime cannot receive full credit. Similarly, a convincing waveform plot does not compensate for missing component limits. The strongest submissions explain what would change their conclusion. Ask learners to present a one-minute defense of the least reliable assumption and to identify the next measurement or calculation that is most likely to overturn the result.

Optional deeper investigation

Vary temperature, parasitic resistance or sensor delay separately. Compare the relative importance of each effect at light load versus rated load. Use an uncertainty table rather than drawing more decimal places. Explain if the most important uncertainty is irreducible without physical measurement, or whether a manufacturer specification supplies a conservative bound. Finally, distinguish the verified result—perhaps an algebraic equality or a checked simulator calculation—from an unverified implication about real hardware.

Safety boundary: EDUCATIONAL MODEL ONLY. Do not connect mains voltage or high-energy batteries to a classroom prototype. A schematic, component value, or simulation in this volume is not a certified electrical-safety design. Use isolated, current-limited training hardware only under competent supervision and follow relevant safety rules, ratings, and test procedures.