Unit 5: Boost and Buck-Boost Topologies: Energy Storage and Voltage Conversion

Unit 5 — Buck conversion and conduction regimes

The engineering argument

A buck converter lowers an input DC voltage using a switch network, inductor and output capacitor. Ideal volt-second balance in continuous conduction establishes D≈Vout/Vin. The inductor current is a triangular ripple around the load current, but if the valley reaches zero the continuous model no longer applies.

A 24 V bus feeding 12 V at 2 A through a buck stage provides a convenient laboratory model. We estimate ripple from duty, frequency and inductance and test the boundary between continuous and discontinuous inductor current.

Inductor sizing is not simply choosing a large L: larger devices cost more and change transient response, while smaller L increases peak current, AC heating and control challenges.

Steady and transient buck models. An ideal buck offers a clean example of piecewise linear inductor voltage. The on-state and off-state slopes can be reconstructed by placing the indicated terminal voltages across the inductor, then applying the sign convention consistently. The triangle waveform is a consequence of that piecewise voltage, not a universal property of every switching converter.

The inductor ripple is set by applied volt-seconds, L and switching period. Output-capacitor ripple is shaped by the capacitor current and impedance, so quoting capacitance alone ignores ESR, ESL and measurement location. Both ripple calculations must be repeated at input voltage extremes.

When the valley of predicted inductor current becomes negative, an ordinary diode-based stage cannot continue to follow the same ideal continuous-conduction triangle. The actual waveform becomes discontinuous and the gain law may depend on load. This is an example of checking the domain of a model before trusting its result.

Feedback does not instantaneously produce missing charge at a load step. Before the inductor current changes, the output capacitor must source the difference. That initial voltage slope is a conservation result, independent of the elegance of the subsequent control algorithm.

Sequence and learning objectives

In the first lesson, identify the model, boundary and relevant physical state. In the second, compute the dominant currents, voltages or losses under a specified operating point. In the third, investigate where the ideal result ceases to hold. In the fourth, convert the model into a design review with independently falsifiable tests. This sequence is intended to prevent equation memorization without comprehension. The central question is not whether a formula can be remembered but whether the learner can recognize when it should not be used.

Unit reading

• 1. [Volt-second balance in continuous conduction](lessons/U05-L01-volt-second-balance-in-continuous-conduction.html)
• 2. [Boundary conduction and peak-current rating](lessons/U05-L02-boundary-conduction-and-peak-current-rating.html)
• 3. [Output capacitor ripple and ESR](lessons/U05-L03-output-capacitor-ripple-and-esr.html)
• 4. [Buck startup, load steps and inductor stress](lessons/U05-L04-buck-startup-load-steps-and-inductor-stress.html)

Unit model: [interactive simulation](simulations/model-05.html). Unit project: [design study](projects/unit-05.html). Assessment: [review problems](assessments/unit-05.html).

Lesson 5.1 — Volt-second balance in continuous conduction

Unit: Buck conversion and conduction regimes. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

During the ideal buck on interval the inductor sees Vin−Vout; during off time it sees −Vout. Periodic steady-state requires (Vin−Vout)DT+(−Vout)(1−D)T=0, giving Vout=D Vin. The ripple current increases when the inductor is subjected to a larger positive volt-second area.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

At Vin=24 V, Vout=12 V, L=100 microhenrys and f_s=100 kHz, D=0.5. The on interval is 5 microseconds and the current increase is (12 V)(5 microseconds)/(100 microhenrys)=0.6 A. The off interval decreases by the same 0.6 A.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

This is a steady average model with ideal switches. Drop across the diode or synchronous switch shifts the duty ratio, while changing source voltage within one cycle modifies the waveform.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Draw v_L(t), i_L(t) and a timing diagram for each switching state. Check the slopes, peak-to-peak ripple and average current against the load.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: Why does the average inductor voltage vanish even though it is ±12 V for almost the entire cycle?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 12 V buck converter ripple and load-step audit. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Competing design alternatives

Compare two configurations with a fixed source, load and service requirement. One should prioritize lower conduction loss or larger energy storage, and the other should prioritize faster switching, smaller size or more economical control. Build a scorecard with heat, component stress, signal noise, cost and verification effort. Give each criterion a unit or a precise definition rather than assigning arbitrary star ratings.

A defensible conclusion should change when the service envelope changes. For example, a low-resistance transistor can be attractive under heavy current while a lower-gate-charge device can be preferable at light load and high frequency. A large bulk capacitor can improve hold-up but worsen startup inrush. Demonstrate at least one such reversal without changing unrelated assumptions at the same time. The objective is to learn why there is rarely one universally best component.

Lesson 5.2 — Boundary conduction and peak-current rating

Unit: Buck conversion and conduction regimes. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

In continuous conduction the inductor current never reaches zero, and I_peak≈I_out+ΔI_L/2 for the ideal triangular current. The boundary to discontinuous conduction occurs at I_out=ΔI_L/2. A converter may enter discontinuous conduction at light load even when it operates continuously at rated load.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

For the previous 0.6 A peak-to-peak ripple, boundary current is 0.3 A. At I_out=2 A, peak current is 2.3 A and valley is 1.7 A; at 0.2 A the assumed continuous triangle would predict negative valley current, signaling a broken assumption.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

Peak magnetic current is not the same as RMS copper current, and a saturation rating can be specified at particular temperature and inductance drop. Inductance often declines as current rises.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Choose inductor saturation current above expected startup, load step and fault transients with appropriate margin. Estimate copper loss from RMS current and DC resistance separately.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: If a converter is regulated to 12 V at 0.1 A, why may the measured duty ratio differ from 0.5?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 12 V buck converter ripple and load-step audit. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Review at a nonnominal condition

Assume the environment becomes hotter, the supply reaches its minimum allowed voltage and the output experiences a short overload. Which number in the worked example is likely to become obsolete first? Rewrite the corresponding balance or stress relation with a conservative placeholder for the uncertain quantity. If no trusted bound is available, leave the conclusion unresolved. An engineering report should explicitly state what has not been established.

Prepare a two-stage verification plan: first check the symbolic result in a calculator or independent script; next check the behavior in a simulation using nonideal elements or a supervised low-voltage teaching bench. Name a stopping condition for the second stage. Independent verification means an alternative physical or computational route to the result, not simply repeating the same source calculation in a different font.

Lesson 5.3 — Output capacitor ripple and ESR

Unit: Buck conversion and conduction regimes. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

The capacitor carries the AC component of inductor current while the load consumes its average. For an ideal buck operating in CCM with triangular inductor ripple, the capacitive part of voltage ripple is approximately ΔV_C≈ΔI_L/(8 f_s C). ESR contributes an additional ripple approximately ΔI_L×ESR, but waveform alignment and parasitics matter.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

With ΔI_L=0.6 A, f_s=100 kHz, C=100 microfarads, ideal capacitive ripple is 0.0075 V. At ESR=40 milliohms the simple ESR ripple estimate is 0.024 V, larger than the ideal capacitive term.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

A calculated 7.5 mV ripple is not what an oscilloscope will necessarily read. Lead inductance, ground loops, capacitor frequency response and switching spikes can dominate the displayed high-frequency trace.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Specify where ripple is measured and its bandwidth. Compare ceramic and electrolytic capacitor behavior using impedance versus frequency rather than relying exclusively on nominal capacitance.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: Why might doubling capacitor value have little impact when ESR dominates the ripple?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 12 V buck converter ripple and load-step audit. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Source-to-load audit

Draw the current path through every conducting component in the operating state most relevant to this lesson. For a resistive component account for I²R heat; for a forward-biased diode account for the current-dependent drop; for an energy-storage element account for the sign of its energy derivative. Explain which path does not carry current during the complementary state. This diagram is a prerequisite for accurate peak, RMS and average claims. If the chosen model is averaged, mark the high-frequency phenomena that will be absent from its output.

Develop a three-column assumptions ledger: the property assumed ideal, the real physical effect omitted, and the likely sign of the error in estimated heat or voltage. Do not automatically assume every neglected effect reduces output voltage; ringing can raise instantaneous device stress while losses lower mean output. Use this ledger to decide which missing information is worth acquiring first. A model is a tool for ranking uncertainty, not a license to choose optimistic component ratings.

Lesson 5.4 — Buck startup, load steps and inductor stress

Unit: Buck conversion and conduction regimes. Focus: energy balance, switching-state modeling, numerical prediction, design limitations, verification. Prerequisites: basic circuit analysis, the definition of average and RMS values, and the relevant preceding lessons. Safety: This is mathematical and simulated content; it does not license direct connection to mains or high-energy battery systems.

What the model is trying to explain

A buck converter supplies changing loads through its output capacitor while the inductor current adjusts. The initial capacitor voltage excursion caused by an uncompensated current step follows dV/dt≈−ΔI/C. Current-limit, soft-start and loop bandwidth dictate how the stage recovers.

The starting point is an electrical system with a stated input, a desired output, and at least one physical storage or loss mechanism. Choose voltage and current arrows before writing any balance equation. This apparently clerical step determines whether a negative term represents energy returned to a source, dissipated heat, or a mismatch of sign conventions. For a switching system the state of the controlled semiconductor changes the governing differential equation; a mean-value formula follows only after the switching states and the relevant steady-state conditions have been established. A time-domain numerical result should therefore always be accompanied by the state assumptions under which it was computed.

Complete numerical walkthrough

An extra 1 A load for 100 microseconds draws 0.0001 C of charge. A 470 microfarad capacitor would initially lose about 0.213 V if no additional inductor current arrives. The later voltage trajectory depends on controller response and ESR.

How to verify the arithmetic independently. First convert every milliohm, microsecond, microfarad, kilohertz and microhenry into consistent base units. Next substitute the stated values into the governing relation in one line before rounding. Keep a separate column for the measured or assumed quantity and the calculated quantity. After calculation, check the physical limiting case: at zero load there should be no load power, at zero switching interval there should not be energy transfer through an ideal PWM command, and the sign of a voltage cannot be changed by efficiency alone. These simple limiting checks often expose a wrong topology or an invalid formula more reliably than another decimal place.

For a useful second calculation, change one design variable while holding the others fixed. If a capacitor is changed, do not simultaneously alter switching frequency and load current, because the effect becomes difficult to attribute. Record which quantities are genuinely controlled and which are consequences of the change. Where the model is an approximation, report its domain of validity beside the number; a precise numerical answer derived outside the model's domain can be more misleading than a rough answer with honest uncertainty.

Why a technically plausible answer may be wrong

A load-step calculation using only capacitance neglects instantaneous ESR step and inductor slew limitation. A nominal feedback bandwidth cannot replace explicit current limit checks.

In particular, distinguish a device rating, a nominal operating point, a predicted steady-state waveform and a measured transient peak. The four are not interchangeable. An ideal average voltage says little about a nanosecond-level overshoot; a calculated RMS current does not establish that a junction temperature is acceptable; a controller response without saturation says nothing about a hard overcurrent event. The reader should identify the first assumption likely to fail at an extreme input, a very light load, a startup event, or a component temperature different from the nominal value.

Engineering decision and defensible tradeoff

Design an output-voltage sag allowance and check whether the available inductor voltage can ramp current quickly enough. Contrast a fast output-capacitor solution with one that relies on higher switching frequency.

State the requirement as a measurable inequality or a bounded interval instead of using only adjectives such as fast, small, efficient or robust. For example, a requirement for output voltage has to name the input-voltage range, load range, transient duration and maximum allowed deviation. A requirement for low loss has to identify the ambient-temperature condition and whether the gate driver or controller is included in the loss accounting. A comparison among device options is not reproducible unless all alternatives are evaluated under the same service conditions.

Also note what is sacrificed when the selected variable is improved. Raising frequency can decrease filter size but increase switching heat; lowering channel resistance may increase gate-charge cost; larger capacitance can improve low-frequency hold-up while increasing inrush; stronger voltage-loop action can improve a small load step but erode phase margin at a different point. Engineering is the management of coupled constraints rather than the maximization of one attractive metric.

Laboratory thinking and falsifiable observations

Investigative question: What is the initial voltage response immediately after a current step for a capacitor with nonzero ESR?

Develop a small simulated experiment with two deliberately different operating conditions and one held-constant reference. The output of the experiment should be a table with physical units, a plotted response and an explicit criterion that would disprove the initial interpretation. Include a counterexample that changes the topology or its conduction mode. If your model predicts an impossible output at a duty limit, do not hide that point; explain which neglected physical mechanism becomes dominant and replace the formula with an appropriate higher-fidelity model before continuing.

To compare simulation with future measurements, define where voltage is measured, how current direction is assigned, the required bandwidth, and the averaging interval. If the result is efficiency, synchronize input and output data. If the result is a switching peak, use appropriately rated equipment and identify probe-induced artifacts. If the result is a protection threshold, include comparator tolerance and intervention latency. This is a review workflow, not an instruction to energize unvalidated hardware.

Practice set — show a numerical answer and an engineering explanation

1. Reconstruct the example: Repeat the supplied computation in SI units, state every approximated parameter, and make a dimensional check. If any input is missing, state that a numerical result is indeterminate rather than inventing one.

2. Alternative operating point: Change the stated input or load by 20%. Explain whether the original formula remains applicable and calculate the new value if sufficient inputs are known.

3. Failure-mode challenge: Identify a capacitor, inductor, semiconductor, driver or sensing failure that could invalidate the optimistic ideal result. Explain which independent signal or check reveals the failure.

4. Specification writing: Rewrite the design decision as a testable requirement with a numerical tolerance, measurement point and operating range. Distinguish thermal limits from electrical limits.

5. Model comparison: Predict which conclusion would survive in an ideal switched simulation, an averaged simulation and a real physical implementation. Name at least one effect visible in one model and invisible in another.

6. Research extension: Find the parameter in the appropriate component datasheet that has the largest uncertainty at elevated temperature. Describe a conservative sensitivity study using that parameter instead of extrapolating one room-temperature curve.

Worked-answer guidance

For question 1, the numerical walkthrough gives the target relation and input values; correct work reports the substituted quantity with its units, not just the final number. In question 2, choose only a single independent change; be explicit about whether the converter remains in continuous conduction or the same thermal state. For question 3, a plausible defect must have an observable consequence and not merely a descriptive label. For question 4, a valid specification tells another engineer exactly what to measure and what constitutes passing. For question 5, an ideal averaged stage cannot resolve switching-edge electromagnetic interference, and a switched circuit model alone cannot establish manufactured-hardware safety. For question 6, a meaningful answer reports the temperature and bias conditions under which the parameter is specified.

Cross-link to the unit design study

This calculation contributes to 12 V buck converter ripple and load-step audit. Put the result into the unit's requirements matrix and identify whether it changes a semiconductor voltage rating, magnetic current rating, controller operating range, expected efficiency or verification plan. A unit project is not complete when a formula produces one plausible number; it is complete when the predicted outcome, the assumptions and the unresolved risks are transparent to a second reader.

Parameter-sensitivity notebook

Construct two more operating points around the worked example by reducing and increasing the selected key parameter by 10%. Repeat the arithmetic and compare the percent response change to the percent parameter change. If the response is nonlinear, explain why its sensitivity grows or shrinks. Examples include the inverse factor 1/(1−D) at high duty, the quadratic I²R dependence of channel heat, and the inverse dependence of ripple on L, C or switching frequency.

For the same change, decide whether the numerical model has moved closer to a known mode boundary, a component maximum rating, a closed-loop stability restriction or a measurement limitation. A derivative taken inside a valid smooth model is useful; it is not sufficient to predict behavior across a discontinuous-conduction boundary or a fault-protection trip. Identify which conclusion is local and which remains valid over the full stated range.

Unit 5 design study — 12 V buck converter ripple and load-step audit

Objective. Show that the reader can connect switching equations to a bounded engineering requirement, rather than only repeat a nominal calculation.

Scenario and data

Use Vin=24 V, Vout=12 V, L=100 µH, f_s=100 kHz, C=470 µF, Iload=2 A, ESR=30 mΩ. Derive duty, on/off times, current ripple, peak current and the two simplified components of ripple voltage. Then impose a 1 A extra load for 100 µs and estimate initial voltage sag from capacitance and ESR.

Find CCM boundary and explain how a duty-based gain rule becomes incomplete below that current. Draw a test matrix for the smallest input voltage, largest input voltage and startup. State which equations are steady state and which are transient approximations.

Engineering notebook procedure

1. Requirements table. Write columns for demanded function, allowed input range, load range, maximum stress, accuracy tolerance, missing information and evidence. Reject adjectives without an associated test. Where values have not been provided, label them 'to be determined' and explain the measurement or datasheet that will resolve them.

2. Energy and switching state diagram. Give the current path in each interval and show inductor voltage or capacitor current with consistent sign conventions. State which approximation lets the calculation use cycle averages. If conduction mode can change, identify the condition at which the derivation stops being applicable.

3. Hand calculation. Carry through at least one numerical case from this unit's lessons, report intermediate values with units, check a limiting case, and recompute it with a 20% parameter variation. Separate assumed input values from computed results and ensure no conclusion depends on a hidden choice of waveform convention.

4. Comparison with a different model. Run the companion offline simulation at three operating points; record how its assumptions differ from the hand calculation. The model must not be described as validated physical hardware. If the simulation refuses an impossible operating point, that refusal is a finding rather than a reason to bypass the guardrail.

5. Failure analysis. Identify at least two independent failures: one electrical stress or thermal failure and one sensing, timing, protection or measurement failure. For each propose an observable symptom and a method that could falsify the simplified design claim.

6. Review and decision. Assemble a one-page design summary with chosen assumptions, calculated quantities, sensitivity, unresolved safety risks, measurement uncertainty and a justified next test. Do not specify live-mains experiments or unsupervised high-energy hardware as part of this project.

Evaluation rubric (20 points)

• Four points: correct switching-state or control-volume representation with reference directions.
• Four points: independently checkable arithmetic, correct SI units and a valid domain of application.
• Four points: design tradeoff and a nonnominal sensitivity study.
• Four points: an explicit falsification or failure test and appropriate safety bounds.
• Four points: clear interpretation of simulation limitations and remaining uncertainty.

Instructor checkpoint

A submission that uses the right numerical formula with the wrong conduction regime cannot receive full credit. Similarly, a convincing waveform plot does not compensate for missing component limits. The strongest submissions explain what would change their conclusion. Ask learners to present a one-minute defense of the least reliable assumption and to identify the next measurement or calculation that is most likely to overturn the result.

Optional deeper investigation

Vary temperature, parasitic resistance or sensor delay separately. Compare the relative importance of each effect at light load versus rated load. Use an uncertainty table rather than drawing more decimal places. Explain if the most important uncertainty is irreducible without physical measurement, or whether a manufacturer specification supplies a conservative bound. Finally, distinguish the verified result—perhaps an algebraic equality or a checked simulator calculation—from an unverified implication about real hardware.

Safety boundary: EDUCATIONAL MODEL ONLY. Do not connect mains voltage or high-energy batteries to a classroom prototype. A schematic, component value, or simulation in this volume is not a certified electrical-safety design. Use isolated, current-limited training hardware only under competent supervision and follow relevant safety rules, ratings, and test procedures.